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Papers/A Sparse and Truncated State Vector Simulator for Peaked Circuits
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A Sparse and Truncated State Vector Simulator for Peaked Circuits

Jul 8, 2026

arXiv
Abstract

In a class of quantum circuits known as peaked circuits, the goal is to predict the most probable bit string at the output of the circuit. Since these circuits are designed to have a sharp peak in their output distribution, in principle it should be possible to simulate them using a truncated state vector with a limited number of terms, or a fraction of the total probability mass. This approximate simulation can be carried out on a classical computer with a sparse representation that stores only the nonzero amplitudes of the state vector, in contrast to the dense representations that are common in most quantum simulators. For efficiency, all operations on the state vector should be vectorized to the furthest possible extent and, if available, hardware acceleration can also be used. This work describes how these requirements were met in an open-source implementation, and discusses its performance and limitations.

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Authors
Diogo R. Ferreira
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arXiv:2607.07816